Difference between revisions of "Lisa Gumstix Breakout"
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m (moved Lisa/M Gumstix Breakout to Lisa Gumstix Breakout: It is meant to be more generic then only Lisa/M) |
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* USB OTG | * USB OTG | ||
* FTDI based USB to serial converter connected to the Overo serial console | * FTDI based USB to serial converter connected to the Overo serial console | ||
* Isolated SPI for connectivity to Lisa/M or other systems | * Isolated LVDS SPI and McBSP for connectivity to Lisa/M or other systems (10MBit rate desirable) | ||
* Isolated USART for connectivity to Lisa/M or other systems | * Isolated USART for connectivity to Lisa/M or other systems | ||
* Levelshifted I2C to 5V/3.3V | * Levelshifted I2C to 5V/3.3V | ||
* Levelshifted Gumstix GPIO to 5V/3.3V | * Levelshifted Gumstix GPIO to 5V/3.3V | ||
* Break out and level-shift GPIO 48,49,50,51. Those pins are the hardware UART TX, RX, CTS, RTS pins. It is very useful to have the CTS and RTS pins broken out, in case someone would want to set up an PPP network link using two Digi XTends. It is not possible to use software flow control in this case, as the binary data stream might contain bytes that equal ctrl+s or ctrl+q. | |||
* Break out PWM GPIO pins, e.g. to be able to control servo's. (level-shift to 5V) Oh... those can be used as timer inputs too of course.... take this into account when level-shifting (maybe add padds for the level-shifted output, and for the un-level-shifted input, for high frequency signal capture) | |||
* Stackable for multiprocessing | |||
Latest revision as of 13:05, 30 November 2012
This page is currently dedicated to a proposal of a Lisa/M to Overo Gumstix breakout board.
System Design
Wishlist
- 10/100 Base-T ethernet phy (at least one if not two)
- USB Host
- USB OTG
- FTDI based USB to serial converter connected to the Overo serial console
- Isolated LVDS SPI and McBSP for connectivity to Lisa/M or other systems (10MBit rate desirable)
- Isolated USART for connectivity to Lisa/M or other systems
- Levelshifted I2C to 5V/3.3V
- Levelshifted Gumstix GPIO to 5V/3.3V
- Break out and level-shift GPIO 48,49,50,51. Those pins are the hardware UART TX, RX, CTS, RTS pins. It is very useful to have the CTS and RTS pins broken out, in case someone would want to set up an PPP network link using two Digi XTends. It is not possible to use software flow control in this case, as the binary data stream might contain bytes that equal ctrl+s or ctrl+q.
- Break out PWM GPIO pins, e.g. to be able to control servo's. (level-shift to 5V) Oh... those can be used as timer inputs too of course.... take this into account when level-shifting (maybe add padds for the level-shifted output, and for the un-level-shifted input, for high frequency signal capture)
- Stackable for multiprocessing