Difference between revisions of "Dev/STM32I2C"

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This page is a work document about STM32 driver
This page is a work document about STM32 I2C driver
Ideas welcome!
 
 
== Documentation ==
 
[http://www.st.com/stonline/products/literature/pm/15491.pdf STM32F10xxx Cortex-M3 programming manual]
 
[http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/ERRATA_SHEET/CD00197763.pdf STM32F101xC/D/E and STM32F103xC/D/E Errata sheet]
 
[http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/CD00171190.pdf RM0008 Reference manual] ( page 726 )
 
== Problem ==
 
We're implementing a "Master" driver.
 
The I2C peripheral on STM32 is very "timing sensitive".
 
It has been experienced that we can not rely on "events" like described in the reference manual and need to implement our own state machine in order to be able to deal with the timing sensitivity of the hardware.
 
== Goals ==
 
-1 never crash the MCU
-2 never crash the peripheral
-3 never provide corrupted data
-4 get as few failed transferts as possible

Latest revision as of 04:12, 15 April 2011

This page is a work document about STM32 I2C driver


Documentation

STM32F10xxx Cortex-M3 programming manual

STM32F101xC/D/E and STM32F103xC/D/E Errata sheet

RM0008 Reference manual ( page 726 )

Problem

We're implementing a "Master" driver.

The I2C peripheral on STM32 is very "timing sensitive".

It has been experienced that we can not rely on "events" like described in the reference manual and need to implement our own state machine in order to be able to deal with the timing sensitivity of the hardware.

Goals

-1 never crash the MCU
-2 never crash the peripheral
-3 never provide corrupted data
-4 get as few failed transferts as possible